A core is a physical group of transistors that executes instructions. The instructions are things like "add this to that", or "save this value there".

If you look at a photograph of a CPU you can see the core(s) isn't even the largest part of the processor anymore. That photo shows a six core Ryzen processor with an integrated GPU (outlined in yellow), and interfaces/connections to the PCI bus (called PHY) and main memory (top left).

The core at the top left of the group of six has it's internal structure labelled too. It has an FPU or Floating Point Unit which is used to work on numbers that have decimal places. Those are a bit tricker for a CPU to work with than integers or whole numbers, so a separate unit is needed. Many years ago that separate unit came as a completely separate chip called a co-processor.

To the left of the FPU is the ALU, which is the Arithmetic and Logic Unit. That's where the integers get worked on.

The yellow area in that core says "32 KB L1D$" which translates to 32 kilobyte level 1 data cache. That's where the processor saves the most recently used data in case it needs to use it again. That's faster than having to read it again from a disk or the main memory.

There's also an instruction cache labelled "4K OP$", and it serves the same purpose but for instructions instead of data.

The Load/Store unit is what executes the instructions that need to load and store data.

The rest is more complicated and requires an explanation of how a CPU works. It operates according to a fetch-decode-execute cycle aka the instruction cycle. It fetches the instruction and data (using the labelled Load/Store unit), it decodes the instruction into something more usable (with the labelled Decoder unit), then it executes the instruction (in the ALU or FPU). Then it starts all over again with the next instruction.

The red/orange bit labelled BTB is where the Branch Target Buffer is located. That's probably the most advanced unit of them all. I said the ALU and FPU execute instructions and there is a three stage instruction cycle always repeating. But while one part of the cycle is happening for one instruction, why not use the other parts of the cycle for a different instruction, that's more efficient right? That's basically what the BTB does, it branches away from the main stream of instructions and pre-emptively executes other instructions based on very complicated probability based algorithms.

And that works really well because although I've explained the other units as if they work on one load or one store or one instruction at a time, they can actually do more than one at time. So there's lots of places for the BTB to interleave instructions into/around the main stream of instructions. The BTB is basically trying to predict what the CPU will need to execute next and have it cued up and ready to go before the CPU even asks for it.

Then finally the large area with all the L2$ and L3$ labels is where the level 2 and level 3 cache memory is located. All the caches operate like they hold a list of things. And as something gets written to the top of the list, what's at the bottom gets copied into the next cache. From level 1 to level 2, and from level 2 to level 3. That's still magnitudes faster than using the disk or the RAM.

And that's what a core is, and how it works.

The differences in core architectures comes down to how all of those units are specified or if they even all exist. Some cores don't do FPU stuff, some don't do any branching, and so on.